The invention relates to a method for forming a diffusion region and in particular to a method for forming a diffusion contact or the like in a semiconductor substrate and in particular for connecting a DRAM memory cell to a vertical MOSFET or the like.
In the case of integrated semiconductor circuits, a large number of components bearing different functions are formed in a very confined space in a semiconductor substrate or the like. In this case, various components must either be connected to one another or adequately insulated from one another.
Certain contacts are made for example as diffusion contacts. In this case, a region of the semiconductor substrate that is initially non-conducting is prestructured and then locally enriched in a targeted manner by a dopant in a doping operation, to thereby increase the conductivity locally in the initially non-conducting subregion of the semiconductor substrate by introducing corresponding charge carriers.
The disadvantage of forming contacts of this type by a diffusion process is that the diffusion process as such generally proceeds more or less isotropically. Therefore, a locally introduced high dopant concentration spreads more or less uniformly in all spatial directions during the thermal outdiffusion or annealing. To be able nevertheless to use the formation of contact regions by diffusion, it is necessary to introduce in the semiconductor substrate a minimum distance between components which absolutely have to be insulated or to form an additional electrical insulation, for example in the form of an oxide region, in order that unwanted instances of contacting or even short circuits are avoided.
The provision of an additional insulating region, for example in the form of an oxide or the like, hinders the individual process steps and consequently increases the costs of production. The maintenance of minimum distances is at odds with the aim and desire of making integrated semiconductor circuits as highly integrated and effective as possible.
It is accordingly an object of the invention to provide a method for forming a diffusion region that overcomes the above-mentioned disadvantages of the prior art methods of this general type, in which the risk of unwanted instances of contacting or short circuits is particularly low.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for forming a diffusion region. The method includes providing a semiconductor substrate, and forming a first conductivity region and a second conductivity region in the semiconductor substrate. The first conductivity region and the second conductivity region are spatially separated from each other by an intermediate region of the semiconductor substrate. The diffusion region is formed between the first conductivity region and the second conductivity region in the intermediate region by thermally activated diffusion of at least one dopant into the intermediate region. The thermally activated diffusion of the dopant is conducted substantially in a directed manner by an interaction of the dopant with a subregion of the intermediate region. A transformation process is thermally initiated at least in the subregion of the intermediate region.
In the case of the method according to the invention for forming the diffusion region, in particular a diffusion contact or the like, in a semiconductor substrate or the like, in particular for connecting a DRAM memory cell on a vertical MOSFET, a first conductivity region and a second conductivity region are spatially separated from each other by an intermediate region of the semiconductor substrate. The diffusion region or the diffusion contact is formed between the first conductivity region and the second conductivity region, in particular in the intermediate region. The forming of the diffusion region or the diffusion contact takes place by thermally activated diffusion of at least one dopant into the intermediate region of the semiconductor substrate. Furthermore, a transformation process is thermally initiated and/or conducted at least in a subregion of the intermediate region, in particular substantially at the same time as the diffusion, and the thermally activated diffusion of the dopant is thereby carried out substantially in a directed manner, in particular substantially in or along a preferential direction, by interaction of the dopant with the transforming subregion of the intermediate region.
A central idea of the present invention is consequently to control the direction of the thermally activated diffusion of the dopant particles by bringing the dopant particles into specific interaction with the subregion of the intermediate region. The interaction is carried out by initiating and conducting a transformation process of the subregion of the intermediate region. By initiating the transformation processes by thermal activation, the corresponding interaction of the dopant particles with the subregion of the intermediate region and the material present there is also achieved at the same time.
More preferably, a chemical transformation process, a crystallization process and/or the like is/are carried out as the transformation process in the subregion of the intermediate region of the semiconductor substrate.
In this case, an oxidation operation is particularly preferred, in particular an oxidation operation using oxygen or with oxygen.
A particularly strong influence of the transformation process in the subregion of the intermediate region is obtained if, according to a preferred embodiment of the method according to the invention for forming a diffusion region, lattice imperfections, reactive centers and/or the like are produced, provided with increased mobility and/or brought into interaction with the dopant particles by the transformation process.
This measure consequently achieves the particular effect that both the mobility of the dopant particles and the mobility of possible lattice imperfections are increased by thermal activation. As a result, the probabilities of certain mass transfers, for example exchange processes or the like, can be correspondingly increased.
In the case of a particularly preferred embodiment of the method according to the invention, a silicon substrate, in particular a bulk silicon substrate, a p-doped silicon or the like, is provided as the semiconductor substrate, as the intermediate region and/or as the subregion thereof.
In the case of a further embodiment of the method according to the invention, the dopant is chosen to match the material of the intermediate region or of the semiconductor substrate and in particular to match the material of the subregion of the intermediate region, in particular with regard to a particularly high mobility of the dopant particles or of the dopant with respect to a preferential direction.
Particularly advantageous properties are obtained if phosphorus or the like is chosen as the dopant. Phosphorus has, for example in comparison with arsenic, a much stronger tendency to interact with lattice imperfections. It is therefore much easier with phosphorus, in comparison with arsenic or the like, to accomplish a directed diffusion along a preferential direction by local forming of mobile lattice imperfections.
Although the dopant can be introduced subsequently into already existing structures, for example locally by corresponding implantation or the like, it is of particular advantage if the dopant is supplied by a depot region, in particular in the semiconductor substrate. The depot region is advantageously created as a material subregion during the production of the basic structures and is then distributed in a desired way during the thermal outdiffusion from the depot region in a directed manner while interacting with the thermal transformation region.
In this case, the depot region may be provided as a separate region in the region of the semiconductor substrate.
It is also conceivable for the depot region to be provided in substantially direct spatial proximity to the first conductivity region, the subregion and/or intermediate region of the semiconductor substrate and/or the second conductivity region.
In the case of a particularly advantageous embodiment of the method according to the invention, the depot region is formed and provided as the first conductivity region or as part thereof, in particular as what is known as a buried-strap region or the like.
In the case of a particularly preferred embodiment of the method according to the invention, a polysilicon region or the like is respectively provided as the first conductivity region and/or as the second conductivity region.
According to another preferred embodiment of the method according to the invention, it is provided that an interfacial region or edge region of the semiconductor substrate or of the intermediate region thereof, in particular with respect to a neighboring medium, is provided as a subregion for the transformation process, in particular in substantially direct connection, in particular along a preferential direction, between the first conductivity region and the second conductivity region.
In this case, a medium having an oxidizing agent and/or a medium supplying an oxidizing agent is provided in an advantageous way as the neighboring medium, in particular an oxygen-containing atmosphere or the like.
With regard to the distribution of the dopant in a directed form, it is of particular advantage that, during the transformation process, a substantially electrically insulating interfacial region and/or edge region, which contains in particular an oxide, a silicon oxide and/or the like, is formed in the subregion.
It is further of advantage that, after the transformation process, a third conductivity region is provided in the direct proximity of the subregion of the intermediate region or of the semiconductor substrate in such a way that a gate region which can be driven via the third conductivity region is formed by the subregion and/or the interfacial region between the first conductivity region and the second conductivity region with the diffusion region or diffusion contact as a connection contact, in particular in the form of a vertical MOSFET or the like.
In this case, the first conductivity region is provided in an advantageous way as a line device, a top electrode device, in particular of a storage capacitor or the like, as a buried-strap region (BS region) and/or as part thereof or a combination thereof.
In the case of another embodiment, the second conductivity region is advantageously formed as part of a bit line or word line.
In a corresponding way, the depot region for the dopant may be provided as part of a top electrode region, of a buried-strap region (BS region) or the like, in particular as a BS-divot-fill region or the like.
The connection of trench memory cells to MOSFETs disposed above them and vertically aligned requires that a diffusion region or diffusion contact is produced. The diffusion region must on the one hand have an adequate material overlap with the gate region or gate oxide of the vertical MOSFET and on the other hand be horizontally localized and restricted on account of the proximity of further elements of the circuit configuration which must not be contacted.
Until now, arsenic-doped polysilicon has been used for contacting in the outdiffusion of the buried-strap region, the arsenic provided forming the corresponding dopant. The dopant diffuses to the same degree in vertical and horizontal directions, so that, when spanning a vertical distance to form the overlap with respect to the gate of the vertical MOSFET, a corresponding diffusion distance is substantially also covered in the lateral direction to neighboring circuit elements which, however, are not to be contacted. To actually avoid undesired contacting, it is therefore necessary to provide correspondingly large distances between neighboring elements of the circuit configuration between which contacting must not occur.
In particular, the use of phosphorus-doped polysilicon in the upper region of the trench cell with subsequent thermally oxidative production of the gate dielectric of the vertical MOSFET allows an anisotropic diffusion to develop. Consequently, the overlap with respect to the gate can be significantly improved, the lateral outdiffusion in the direction of circuit elements which are not to be contacted remaining limited at the same time on account of the reduced necessary diffusion time.
In an advantageous way, phosphorus is consequently introduced in the upper part of a DRAM trench cell and the contact with the vertical MOSFET lying above it is established by utilizing the effect of what is known as oxidation-enhanced diffusion.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for forming a diffusion region, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.